EDN

Targeting Floating-Point Algorithms for FPGA or ASIC Deployment

Native Floating-Point HDL code generation allows you to generate VHDL or Verilog for floating-point implementation in hardware without the effort of fixed-point conversion. Native Floating-Point HDL ...
Neowin

Half is a new binary floating-point type in .NET 5 Preview 7 to speed up ML workflows

The new Half type is composed of 16 bits and will be geared towards speeding up machine learning workflows by enabling faster computation and smaller storage requirements at the expense of precision.
EDN

How to create fixed- and floating-point IIR filters for FPGAs

Infinite impulse response (IIR) filter implementations can have different forms (direct, standard, ladder, …), different math (fixed-point or floating-point), and different quantization (number of ...
Electronic Design

What’s the Difference Between Fixed-Point, Floating-Point, and Numerical Formats?

Embedded C and C++ programmers are familiar with signed and unsigned integers and floating-point values of various sizes, but a number of numerical formats can be used in embedded applications. Here ...
insideHPC

Has the Decades-Old Floating Point Error Problem been Solved?

Today a company called Bounded Floating Point announced a “breakthrough patent in processor design, which allows representation of real numbers accurate to the last digit for the first time in ...