The testing and verification of semiconductor chips was a prominent topic at this year’s European Test Systems (ETS) conference, especially in the area of Design-for-Test (DFT) tools and techniques.

Scan is a structured test approach in which the overall function of an integrated circuit (IC) is broken into smaller structures and tested individually. Every state element (D flip-flop or latch) is ...

With Design-For-Test (DFT), test coverage is the typical yardstick used to gauge the quality of the manufacturing tests being performed. But as next-generation designs become more complex, traditional ...

All companies striving to survive and grow in today’s worldwide electronics industry recognize the value of performing design, development, and troubleshooting tests. These tests should be done early ...

Hardware-in-the-loop (HIL) testing is a technique used to develop and test complex real-time embedded systems. HIL simulation provides an effective testing platform by adding the complexity of the ...

In this digital world, it may be hard for some to believe that there’s still a place for anything manual or physical—especially in the engineering realm. And, while it’s true that today’s technologies ...

Connected devices and systems have become an integral part of our everyday life and we take this for granted. Finding the fastest way to our destination with a smartphone, reading the news on a tablet ...